Prachi Pandey is currently working as a Scientist E at C-DAC, with over two decades of experience in high-performance computing (HPC) and system software. She leads teams working on compiler technologies across multiple projects, with a focus on LLVM- and MLIR-based compiler frameworks, encompassing frontend integration, optimization pipelines, and backend development for advanced processor and accelerator architectures. Her research interests include compiler and runtime support for accelerators, RISC-V compiler ecosystems, hardware–software co-design, performance-oriented code generation, and benchmarking and performance analysis for HPC and AI workloads. She has authored several national and international publications and has delivered tutorials and invited talks at multiple conferences and technical forums, including the Supercomputing India (SCI) Conference (December 2025) and the Innovation in Compiler Technology (IICT) Conference (September 2025). She has also conducted compiler-focused hackathons and technical events such as SegFault as part of these conferences, contributing to community building and skill development in compiler technologies.