Date & Time
Tuesday, April 14, 2026, 5:15 PM - 5:45 PM
Name
Writing a Formal Execution and Memory Model for Execution Synchronization Primitives on AMD GPUs.
Session Type
Technical Talk
Abstract/s
Overview of ongoing efforts to develop and document a formal execution model for the execution synchronization primitives (barriers) of the AMDGPU backend, and how they integrate with the LLVM and AMDGPU target-specific memory models. The talk will also cover the motivation for this work, the benefits for users and developers, and the challenges we faced and are still facing.
Speakers
Location Name
Lansdowne