Yury Plyakhin is a compiler engineer at Intel working on the SYCL/DPC++ compiler and runtime, and one of the technical leads for the SYCL upstreaming effort in LLVM. He has contributed to different parts of the SYCL implementation for several years; his recent LLVM offloading work includes the OffloadBinary Format V2 redesign, device-code splitting in clang-sycl-linker, and simplified SYCL offload wrapping and runtime registration. He has presented on SYCL upstreaming at the Khronos SYCL WG and the UXL Foundation.