Date
Tuesday, October 27, 2026
Name
Reducing Code Size when Frame Pointers are Enabled on RISC-V
Session Type
Technical Talk
Abstract

Enabling frame pointers is increasingly the default across Linux distributions and embedded software stacks, providing reliable stack unwinding, system-wide profiling, and accurate crash backtraces. On RISC-V, however, enabling `-fno-omit-frame-pointe`r introduces a code-size regression that is a problem especially for embedded and IoT targets which are constrained by fixed memory budgets. This talk presents a targeted modification to the LLVM RISC-V backend that recovers this lost code size by preferring `sp` over `fp` as the base register whenever the SP-relative offset falls within the compressed immediate range, without any change to the ABI or the frame-pointer guarantee. Measurements across Embench-IoT, CoreMark and the LLVM test-suite on both rv32imac and rv64gc demonstrate that the patch recovers approximately half of the frame-pointer code-size overhead, with compressed-instruction density increasing by up to 12% and overall code-size overhead reduced from roughly 5–6% down to 2–4%.

Location Name
Hall of Cities