Name
Accidental Dataflow Analysis: Extending the RISC-V VL Optimizer
Session Type
Technical Talk
Date & Time
Wednesday, April 16, 2025, 5:15 PM - 5:45 PM
Abstract/s
A tour of some recent work on the RISC-V backend, motivated by the ongoing effort to implement VL tail folding for the vector extension. We showcase an engineering-first approach to a classical compiler problem: Looking at how to identify areas of code generation to improve, how some incremental changes to the VL optimizer pass led to a form of dataflow analysis, and how we can guarantee some properties by looking at the underpinning mathematical theory.
Speakers
Location Name
Pavilion Room