1. Implementing MIR Pattern Matching & Rewriting for GlobalISel Combiners - Pierre van Houtryve
2. Enhancing clang-linker-wrapper to support SYCL/DPC++ - Alexey Sachkov
3. Parallelizing applications with indirect memory writes in MLIR - Pablo Antonio Martinez, Hugo Trachino
4. Arcilator for ages five and up: flexible self-contained hardware simulation made easy - Théo Degioanni
5. 3 years of experience with the LLVM security group -- successes and remaining challenges - Kristof Beyls

Implementing MIR Pattern Matching & Rewriting for GlobalISel Combiners -Pierre van Houtryve
GlobalISel combiners long relied on ad-hoc C++ code to do most of the work despite using TableGen to define their combiner rules. I have recently worked on adding in/out MIR patterns support (complete with a PatFrag-like system and type inference) to the GlobalISel combiners infrastructure which allows us to write many combiner rules directly in TableGen. In this talk, I will be giving an overview of my work on this project and some ideas for what could come next.

Enhancing clang-linker-wrapper to support SYCL/DPC++ -Alexey Sachkov
Driven by Intel, SYCL/DPC++ compiler is an LLVM-based project that implements support for the SYCL Language. We (Intel) have made several changes to the clang-linker-wrapper tool to support SYCL device code linking and wrapping. This talk provides an overview of key features we have introduced to the tool in our downstream implementation. The talk will focus on our approach of device code handling, novel mechanism for propagating various metadata from the compiler to the runtime and few other changes.

Parallelizing applications with indirect memory writes in MLIR -Pablo Antonio Martinez, Hugo Trachino
Indirect memory writes are present in many AI and HPC applications. However, automatic parallelization of such applications is hard due to data races. In this work we propose a new method to automatically parallelize loops with indirect memory writes in MLIR, showing up to 4.9x speedup across several benchmark suites.

Arcilator for ages five and up: flexible self-contained hardware simulation made easy -Théo Degioanni
Arcilator is a simulator for hardware specified in CIRCT dialects (the MLIR hardware modelling subproject). We introduce a new dialect-based interface for Arcilator, which eliminates the need to build heavy C++ wrapper hand-crafted for each hardware model needing simulation. We explain how it is built internally and showcase interesting use cases.

3 years of experience with the LLVM security group -- successes and remaining challenges -Kristof Beyls
The LLVM security group was established 3 years ago to enable responsible coordinated disclosure of LLVM security issues. This presentation will briefly summarize what the group is doing; what it has achieved in the past 3 years; and which areas for improvements become clear after analyzing the kinds of issues that were reported. Those include areas such as threat modeling, improving quality of mitigation features, supply chain attacks and how to communicate public security issues that are not CVE-worthy.