1. Target-Independent Integer Arithmetic -Jeff Niu
2. How to run the LLVM-Test Suite on GPUs and what you’ll find -Johannes Doerfert
3. Advanced Bug Reports: Choose Your Own Adventure -Arseniy Zaostrovnykh
4. CORE-V LLVM: Adding eight vendor extensions to standard RISC-V LLVM -Charlie Keaney, Chunyu Liao
5. Switch per function in LLVM -Tomer Nissim Schneider
6. "Another level of indirection" - Compiler "Fallback" of load/store into gather/scatter enhance compiler robustness by overcoming analysis and hardware limitations -Omer Aviram

Target-Independent Integer Arithmetic - Jeff Niu

How can you fold address arithmetic without knowing the maximum machine integer size? How about C integer types with variable widths? What about range analysis? Folding target-independent IR is important in producing target-agnostic serialization, where introducing a target can cause invalid arithmetic semantics. This talk will present a formulation for target-independent integer arithmetic, its limitations, and how it was implemented in MLIR.

How to run the LLVM-Test Suite on GPUs and what you’ll find - Johannes Doerfert

Running codes on GPUs is nowadays pretty easy. However, testing GPU compilation on a large, well-understood selection of codes is not. We present an automated approach that allows running (most) existing codes on the GPU in order to test the optimizations and backends. We present our findings from running (most of) the LLVM Test Suite on modern GPUs and show how we combine existing functionality to create concise GPU reducers for bugs.

Advanced Bug Reports: Choose Your Own Adventure - Arseniy Zaostrovnykh

Finding actual bugs using the Clang Static Analyzer (CSA) is only half of the story. Getting bugs fixed also requires convincing developers that those bugs are real. Traditional bug reports, however, are typically either too short and miss important details, or too long such that they overwhelm developers with information. This talk presents a novel approach to make CSA-bug-reports interactive to confront developers with exactly the amount of information they need to understand and confirm a bug.

CORE-V LLVM: Adding eight vendor extensions to standard RISC-V LLVM - Charlie Keaney, Chunyu Liao

CORE-V is a family of open source commercially rust RISC-V designs from the Open Hardware Group, with a set of 8 custom instruction set extensions. This talk will look at the practical challenges we have encountered in supporting vendor specific extensions to RISC-V in LLVM. This has been a collaborative project across several organizations on two continents, and with an additional objective of training a new generation of LLVM developers in China and Europe.

Switch per function in LLVM - Tomer Nissim Schneider

At CEVA, we have found that more optimizations and compiler hints are extremely essential for optimizing code of our customers.​ We added support for clang switches as function attributes.

"Another level of indirection" - Compiler "Fallback" of load/store into gather/scatter enhance compiler robustness by overcoming analysis and hardware limitations -Omer Aviram

I'll introduce a recently developed LLVM-IR utility that can improve compilers robustness, by converting ("fallback") memory accesses (load/store) with a constant stride, into indirect accesses (scatter/gather); Discuss interesting cost decisions raised by such transformations; as well as the technical challenges faced in transforming load/store instructions with a single pointer into gather/scatter instructions with a vector of pointers.