This talk will bring you up to speed on today's scalable vector design, which includes new interfaces, IR types and intrinsics (e.g. for implementing scalable shuffle vectors). We'll cover the implications for existing code and explain how and when LLVM developers need to consider these new concepts in IR- and CodeGen passes. We'll also cover how the loop vectorizer uses these features to produce a binary that runs on a range of CPUs with varying vector lengths and how we can still implement a sensible cost-model. Finally we demonstrate a bridge to fixed-width vectors and SLP vectorization, as well as a way to validate the scalable IR.